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PCB design tool enables
post layout analysis of signal integrity at up to
Gigabit speeds
PCB
designers faced with increasing clock speeds, faster switching
devices and increasingly dense layouts need effective post-layout
simulation and verification if unnecessary design iterations
are to be avoided; design ‘rules-of-thumb’ are
no longer accurate enough. CADSTAR
SI Verify, a new tool within Zuken’s CADSTAR PCB
design suite, provides these capabilities at up to Gigabit
speeds. The tool uses a transmission line simulation approach
to analyze reflection and crosstalk effects and also facilitates
real interconnect timing and delay analysis. It incorporates
a graphical scenario editor, layer stack definition for optimization
of impedances and layers, an EMC device library, and the
option to perform interactive simulation or batch simulation.
CADSTAR SI Verify enables Fast Fourier Transform (FFT) analysis
in time or frequency domains and provides sophisticated crosstalk
analysis and optimization of track spacing. It also provides
for simulation of differential pairs or positive-referenced emitter-coupled
logic (PECL) and a parameter sweep helps determine the ideal
values of passive components or transmission line lengths to
achieve the desired electrical performance of nets.
The tool is fully integrated into the CADSTAR design flow and
engineers need not be signal integrity experts to be able use
it.
Ralf
Brüning,
Product Manager at the Zuken EMC Technology Center commented:
“Design techniques such as using lower frequency components
and avoiding those with fast edge rates may be neither appropriate
nor sufficient today; and lengthy design iterations are no longer
an option for many companies. As board complexity increases,
CADSTAR SI Verify, with its new simulation engines for time domain
and frequency domain transmission line simulation can help our
customers to stay competitive. Also, support for Gigabit design,
with features like lossy transmission line simulation, enables
them to employ leading-edge design processes that take account
of physical and electrical design performance simultaneously.
This drives down time-to-market and maximizes both product quality
and yield”.
CADSTAR is an integrated, PC-based PCB design suite that includes
hierarchical schematic capture, PCB layout, single operation
post-processing for manufacturing, library creation, and automatic
and interactive routing. It is used for single-sided, double-sided,
multilayer, and surface mount board design.
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For further information and reader inquiries:
| Ev
Milker, Zuken Ltd., 1500 Aztec West, Almondsbury, Bristol,
BS32 4RF, UK |
| Tel:
+44 (0)1454 207800 |
E-mail:
Ev.Milker@zuken.com |
| Fax:
+44 (0)1454 207803 |
Web:
www.zuken.com |
About Zuken:
Established in 1976, Zuken has evolved into a provider of solutions
that maximize the efficiency of the design and manufacturing processes
of electronics companies around the world. Zuken holds a leading
global share of the PCB/MCM/HIC software market in the field of
electronic design automation (EDA). In addition to its longstanding
experience as a provider of innovative solutions for PCB design,
Zuken’s expanded portfolio encompasses proven solutions for
the development of information technology (IT) infrastructures.
Listed on Level 1 of the Tokyo Stock Exchange, the company is headquartered
in Japan and has development, sales and support centers in 10 countries
including the US, Germany, UK and France. Zuken's customers include
the world's top 30 electronics manufacturers from automotive to
aerospace, communications to consumer electronics, and medical
to military.
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